August 24: Distinguished Speaker Series at New Delhi  

IESA-NCR Distinguished Speaker Series

“SOC Realization:
A Promising Approach to the Challenges Facing the Semiconductor Industry”

Dr. Ajoy Bose
Chairman & CEO, Atrenta Inc.

The Indian Semiconductor Association’s NCR Chapter in association with Atrenta Inc. is pleased to present Dr. Ajoy Bose, Chairman & CEO of Atrenta Inc, as a speaker in the IESA-NCR Distinguished Speaker Series. Please mark your calendar for this afternoon event on Wednesday, 24th August, 2011.

Speaker Profile

Dr. Ajoy Bose is a veteran of the EDA and semiconductor industry. He began hiscareer at AT&T Bell Laboratories in Murray Hill, N.J. where he led pioneering developments in Integrated Circuit design automation technology. From AT&T, he moved to Cadence Design Systems where he served as Vice President of Engineering. In this role, he managed and led the team that developed the Verilog simulation products which became the globally accepted standard for complex Integrated Circuit design. Dr. Bose was founder and president of Software & Technologies, Inc. and followed that by founding Interra, Inc. During his tenure as Chairman and CEO of Interra, Dr. Bose incubated and spun out a number of successful ventures in Electronic Design Automation (EDA), Digital Video, and IT services. He is currently the Chairman, President and CEO of Atrenta, one of the largest privately held EDA companies in the world, whose flagship product line, SpyGlass, is an industry standard.

Dr. Bose received a Bachelor’s degree in Electrical Engineering from the Indian Institute of Technology in Kanpur, India, which awarded him the Distinguished Alumni award. He earned his MS and PhD in Electrical and Computer Engineering from the University of Texas at Austin.

Fortune Inn Grazia                      
Block I, Plot 1A, Sector - 27                      
Noida, UP 201301                                     
Tel: +91-120-3988444

Wednesday, 24th August, 2011
Registration : 3:30 pm – 4:00 pm
Talk            : 4:00 pm – 5:00 pm

Who should attend: This talk is ideal for senior design engineers, design managers, EDA professionals, graduate level students and faculty of engineering institutes.